Abstract

New algorithms are being developed in the radar community that blend a priori knowledge source processing with traditional digital signal processing concepts. This operational blend necessitates a system-level architecture capable of delivering both high processing throughput and memory bandwidth. This paper derives these system parameters from the knowledge aided pre-whitening algorithm and evaluates the performance of two high performance embedded computing architectures, the Imagine and Raw processors, on these kernels. The implementation results are compared with the measured performance of a conventional system based on the PowerPC with Altivec. The results show these processors exhibit significant improvements over conventional systems and that each architecture has its own strengths and weaknesses.

Date

April 29, 2004

Authors

Matthew C French, Jinwoo Suh, John Damoulakis, Stephen P Crago

Conference

Proceedings of the 2004 IEEE Radar Conference (IEEE Cat. No. 04CH37509)

Pages

382-387

Publisher

IEEE