Abstract

Configurable computing researchers are often sidetracked by tool and infrastructure needs while pursuing unique and novel work, and frequently resort to simplified device models for lack of real architectural data. To address these issues, we present and describe Torc, an open-source C++ infrastructure and tool set for reconfigurable computing, suitable for custom research applications, for CAD tool development, and for architecture exploration. The Torc infrastructure can read, write, and manipulate EDIF, BLIF, and XDL netlists, as well as Xilinx bitstream packets (without however understanding configuration frame internals). The Torc tools include placing and routing for full or partial designs, along with additional capabilities to facilitate design manipulation and analysis. In support of these capabilities, Torc provides exhaustive wiring and logic information for all major Xilinx devices, derived from nonproprietary sources. We believe that Altera architectures and designs could be similarly supported if the necessary data were available, and we have successfully used Torc internally with custom architectures.

Date

January 1, 1970

Authors

Neil Steiner, Aaron Wood, Hamid Shojaei, Jacob Couch, Peter Athanas, Matthew French

Journal

19th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays