Dr. Zick is the Research Director of Transformational Computing at USC ISI, leading efforts to solve problems of national importance using breakthrough computer paradigms, hardware and systems. He brings experience and passion for unconventional computing, adaptive computing, and new approaches such as hardware-centric algorithm discovery. Dr. Zick studied under pioneer John H. Holland (genetic algorithms, complex adaptive systems) and was awarded a NASA Fellowship covering his Ph.D. work in Physically Adaptive Computing. His vision is grounded by experience developing commercial microprocessors and ASICs (IBM/Cyrix x86, Motorola), FPGA insights, and leading key government-funded research programs such as Northrop Grumman's IARPA QEO effort in superconducting quantum annealing. His patented inventions include logic designs that enabled commercial products (6x86MX microprocessor), a practical superconducting flux memory, and a novel asynchronous Ising machine; pending patents include a novel algorithm with beyond state-of-the-art performance.

Dr. Zick's current R&D directions center around novel computer paradigms, architectures, and processing solutions for critical government problems. Specific research interests include:

• Unconventional computing
• Breakthrough processor architectures and systems
• Specialized optimizing solvers and Ising machines
• Neuromorphic computing
• Analog-digital hybrid computing
• Superconducting processing
• Algorithm discovery
• Engineer-AI co-design
• Quantum system engineering
• Bio-inspired computation
• Physics-inspired computation

Capabilities include:

• Advanced digital ASIC design and prototype demonstrations
  • Hardware accelerators for dramatically improved efficiency, agility or security
  • High-speed I/O including advanced SerDes PHYs
  • Experience with advanced fabrication nodes in multiple foundries
• Advanced FPGA-based solutions
  • Advanced use of AMD-Xilinx Versal devices
  • Specialized FPGA tools
  • FPGA-based ASIC emulation
  • Hardware lab with wide variety of FPGA boards
• Novel approaches to solving optimization problems
  • Novel methodology called hardware-centric algorithm discovery. First used to discover the hardware-friendly algorithm below.
  • Novel heuristic algorithm called Cosm for sparse Ising optimization, with demonstrated best results on the largest Gset Ising/Max-Cut benchmark problems:
    

    Performance report of heuristic algorithm that cracked the largest Gset Ising problems (G81 cut=14060), arXiv:2505.18508 [cs.DS], 2025.

  • Highly efficient fully connected CMOS-based Ising/QUBO solvers
• Superconducting electronics architectures
• Collaboration with USC ISI's MOSIS 2.0 and the California DREAMS hub in the DoD Microelectronics Commons

Sampling of projects:

• DARPA DPRIVE - Hardware accelerator for fully-homomorphic encryption (Trebuchet)
• DARPA PROWESS - Agile RF processor (TRACER)
• New program (announcing soon)